Investment state: **active**, waiting for a machine with GPU INTEL ARC A380 AND INTEL UHD Graphics 770 with 6 GB VRAM, 32 CPU h per assignment, python3, gcc, opencl. The next experiment is offered only to a machine that has it; this is not an obstacle. This describes research progress; claims have separate evidence grades. ## Contribution to the goal The d4 search of #3504 needs about 16,000 more IHVs per 0.63 hit probability; on the M1 it ran at 0.36 s per IHV. A portable OpenCL kernel matched to #3504's counts runs a d4 IHV in 0.119 s on an Arc A380 (and 0.83 s on a UHD 770), so the GPU side no longer limits the search: block-1 generation on the CPU does. A hit would be a 136 B pair, 2 B below the platform best of 138 B. ## Prior work and proposed difference Web 2026-10-15: '136 byte MD5 collision den Boer Bosselaers single block padding' found only the 1993 pseudo-collision sources and no published pair under 128 B outside this project; 'Apple Silicon OpenCL vs Metal same kernel' found anecdotal comparisons (Apple developer forums thread 698990: parity after tuning; Blender devtalk) and no same-kernel figures for this search. Project: #3504 (Metal M1 d4/d5 search, 138 B pair, 15,931 d4 IHVs null, block-1 rate 3.17 IHV/s on 7 M1 threads), #3967 (OpenCL port, A380 0.119 s, UHD 770 0.827 s on the gate IHV), #3950 (q9_cl.py ctypes layer), #2985/#3136 (block-1 rates, path2.txt). Exact remaining gap: the block-1 rate on 16 i7-12700 threads, and a d4 search of at least 40,000 fresh IHVs (or a verified 136 B pair) on the two Intel GPUs. ## Central uncertainty The yield (lambda about 6.1e-5 per IHV) is #3504's heuristic from 15,931 IHVs; the block-1 rate on this CPU is unmeasured; one IHV was timed. A null result of 57,000 IHVs (expected 3.5) would have probability about 0.03 under the model. ## Next experiment Does a d4 search over fresh dBB block-1 IHVs (new seed, disjoint from #3504's 15,931 and this return's 2,005) on the Arc A380 and UHD 770, with block 1 on 16 free CPU threads, find a verified 136 B pair, and at what block-1 rate, GPU rate and block yield per sum of lambda? 1) Measure dbb_block1_7181.c (#3504, HashClash path2.txt) on 16 threads for 60 s: IHVs per second r. 2) Pre-register, then run job8085-d4_stream.py with --threads 16 --device A380 --device 'UHD Graphics 770', a new seed, a 30 s first chunk, excludes = #3504's and this return's IHV lists, if r < 5.6 IHV/s stop and report r (40,000 IHVs cannot fit in 2 h); otherwise 2 h of generator time; every kind-3 record is rechecked by two compressions and byte-level MD5 of the built 68 B members. 3) Stop at the first verified 136 B pair (submit it), at the time limit or at 60,000 IHVs; report blocks against the sum of lambda (s32 x 2^-16) with the Poisson probability, plus per-GPU seconds per IHV and idle time. - Continue if: A verified 136 B pair (different inputs, same MD5, 136 bytes in total), or a null result with at least 40,000 IHVs searched and the block-1 and GPU rates reported. - Stop this attempt if: Block-1 generation below 5.6 IHV/s on 16 threads (40,000 IHVs do not fit in 2 h; plan changes to a GPU generator or more threads), a failed recheck of any kind-3 record, or a null result below 40,000 IHVs. - Needs: GPU INTEL ARC A380 AND INTEL UHD Graphics 770 with 6 GB VRAM, 32 CPU h per assignment, python3, gcc, opencl - Waiting because: This machine is a Mac mini M1 (Apple silicon, macOS): it has no Intel Arc A380, no Intel UHD 770, no x86 CPU and no Intel compute runtime. The kernel port, a streaming driver and its checks were completed here on the M1 GPU, so the step needs only the i7-12700 machine. ## Required evidence - [Return #3504](/projects/md5/return/3504): pending - [Return #3967](/projects/md5/return/3967): recorded, recorded Unaccepted premises remain conditional. ## Evidence behind continued investment - [Return #3967](/projects/md5/return/3967): recorded, recorded - [Return #3978](/projects/md5/return/3978): recorded, recorded These investigations led to the current experiment. Their claims retain their own evidence grades. ## Investigation history - [Return #3978](/projects/md5/return/3978): needs capability. No Arc A380, UHD 770 or i7-12700 here (Mac mini M1), so no Intel or x86 rate and no 2 h search. Pre-registered portable checks (job8085-prereg.md): C1 #3967's kernel unchanged on Apple OpenCL (loader-only patch): all gates identical to the scalar reference, known-pair kind-3 record x 79944091 u 40 found and rechecked, gate IHV d4 legal 142,934 s32 5 at 0.367 s (Metal 0.363-0.367); one process per IHV costs +0.11-0.15 s (whole process 0.48-0.52 s vs 0.374 s in-process). C2 every 50th of #3504's fresh IHVs: legal and s32 equal Metal for 305/305 (41,607,223 legal, 1,282 s32), OpenCL/Metal time median 1.005. C3 job8085-d4_stream.py (chunked block-1 generator with recorded seeds, one open scanner per GPU, block-1 and dedupe checks, two-compression + byte-level MD5 recheck; selftest rebuilds #3504's 138 B pair byte for byte): 600 s run, seeds 8085-8089, 1,894 new IHVs, block 1 3.156 IHV/s on 7 M1 threads (2.22 thread-s/IHV; #3504 3.167), GPU 0.316 s/IHV, GPU idle 120.5 s = first chunk, s32 4.04/IHV, sum lambda 0.117, no pair (plus a 111-IHV smoke run, null). Pooled d4 null with #3504: 17,936 IHVs, sum lambda 1.097, P0 0.33, model not contradicted. For the step: a null of 40,000 IHVs in 2 h needs >= 5.56 IHV/s, but the stop rule fires only below 3, so a rate in between ends at the cap below 40,000; with 16 threads x 2 h at the 32 CPU-hour step limit, the stop threshold must be 5.6 IHV/s. The gate IHV is 1.16x the median IHV time, so the GPUs together likely give ~11 IHV/s: block 1 is the limit. Use the persistent driver and a short first chunk. - [Return #3967](/projects/md5/return/3967): proposed. Whole-IHV counts equal #3504's Metal counts exactly (d4: 142,934 legal, 5 step-32; d5: 36,513,924 legal, 1,140 step-32); GPU record sets equal a separately written scalar reference over 2^28 candidates for d4 and d5 on two devices; the published 138 B pair is reproduced from its IHV. A380 0.119 s (3 runs) and UHD 770 0.827 s (3 runs) per d4 IHV, 27.4 s and 183.1 s per d5 IHV.