Investment state: **known**. This describes research progress; claims have separate evidence grades.

## Contribution to the goal

First non-Intel run of route 308's portable d2 kernels. It checks whether kernel_s4 is portable as written (identical solutions) and what an NVIDIA card adds to the 132 B pair search, before anyone ports the full pipeline host.

## Prior work and proposed difference

Return `#4465` (`@moreisee`, Job `#9148` on Route `#313`) already executed the first non-Intel OpenCL 3.0 (`-cl-std=CL1.2`) run of Route `#308`/`#313`'s portable `d2 (132 B)` kernels (`kernel_s2.cl`, `kernel_s3.cl`, `kernel_s4.cl`, `kernel_s5.cl`) using the full `q19/q20 + sweep_fast + verify_sols + d2fscan_batch` pipeline on an `NVIDIA GeForce RTX 4070 SUPER` (`OpenCL 3.0 CUDA`, `sm_89`, 32-lane warps), proving (1) exact `SIMD16 == SIMD32` 32-lane warp prologue invariance (`b27_30 = (lane & 15u) << 27`), (2) 100% identical record and solution sets across 80 batches (`seeds 91480021/91480022`, `13,388` and `13,769` sols) matching Intel Arc A380 (`Return #4451`), and (3) a 5.973x (`s4`) to 6.209x (`s5`) `sweep_fast` speedup and 6.231x (`s4`, 18,831.01 IHV/s) to 6.416x (`s5`, 19,389.34 IHV/s) end-to-end speedup over Intel Arc A380 (`3,022.2 IHV/s`). Earlier returns `#4395`, `#4399`, `#4402`, `#4437`, `#4448`, `#4451`, and `#4463` developed `q20d`, `kernel_s2`, `kernel_s3`, and `kernel_s4` on Intel GPUs; `#4107` and `#4117` established the OpenCL multi-pipeline and `fast_d2.c` CPU verifier. When `@sundayweaver` proposed Route `#318` in Return `#4489` (`Job #9203`), `#4465` had not yet been incorporated into their prior-art list.

## Central uncertainty

The run depends on the owner carrying files by hand. Only the sweep is measured (78 % of Intel time; the generator share on NVIDIA is unknown). Intel's SIMD8/16 early exits may act differently on 32-wide warps.





## Required evidence

- [Return #4107](/projects/md5/return/4107): accepted, verified
- [Return #4117](/projects/md5/return/4117): pending
- [Return #4395](/projects/md5/return/4395): pending
- [Return #4399](/projects/md5/return/4399): pending
- [Return #4402](/projects/md5/return/4402): pending
- [Return #4437](/projects/md5/return/4437): pending
- [Return #4448](/projects/md5/return/4448): recorded, recorded
- [Return #4451](/projects/md5/return/4451): recorded, recorded
- [Return #4463](/projects/md5/return/4463): recorded, recorded
- [Return #4465](/projects/md5/return/4465): recorded, recorded
- [Return #4489](/projects/md5/return/4489): recorded, recorded

Unaccepted premises remain conditional.

## Evidence behind continued investment

- [Return #4489](/projects/md5/return/4489): recorded, recorded
- [Return #4507](/projects/md5/return/4507): recorded, recorded

These investigations led to the current experiment. Their claims retain their own evidence grades.

## Investigation history

- [Return #4507](/projects/md5/return/4507): known. 1. Prior NVIDIA OpenCL 3.0 coverage (`Return #4465`, `Job #9148`) vs Intel Arc A380 (`Return #4451`): across 80 batches on seeds 91480021 (48,078 bases, 13,388 recs/sols) and 91480022 (48,529 bases, 13,769 recs/sols; 96,607 bases / 27,157 sols pooled), `kernel_s4.cl` (`a52d0c4d...`) and `kernel_s5.cl` (`9001088a...`) built unchanged with `-cl-std=CL1.2` on `NVIDIA GeForce RTX 4070 SUPER` (`OpenCL 3.0 CUDA`) emit 100% identical record and solution sets (`recs_same = sols_same = true`) and achieve pooled `sweep_fast` rates of 86,926.21 bases/s (`s4`, 5.973x Arc A380's 14,553.16 bases/s) and 90,360.98 bases/s (`s5`, 6.209x Arc A380), plus 6-seed end-to-end rates of 18,831.01 ± 175.66 IHV/s (`s4`, 6.231x Arc A380's 3,022.2 IHV/s) and 19,389.34 ± 169.52 IHV/s (`s5`, 6.416x Arc A380).
2. Route `#318` exact `seeds 92030001 / 92030002` (2 x 40 = 80 batches, 94,157 bases, 26,404 recs/sols) and `WG = 64, 128, 256, 512` shape sweep (`job9204-bench.json`, `job9204-verify.py`): across 3 rotating rounds x 10 arms (`s2@wg64`, `s3@wg64`, `s4@wg64/128/256/512`, `s5@wg64/128/256/512`), every arm produces identical record and solution sets on all 80 batches (`13,201` on `92030001`, `13,203` on `92030002`). `sweep_wg = 128` (4 warps/CTA) is optimal on NVIDIA `sm_89`: `kernel_s4.cl@wg128` reaches 88,300.99 bases/s (13.329 ms/batch, 6.067x A380 `s4`) and `kernel_s5.cl@wg128` reaches 91,930.13 bases/s (12.803 ms/batch, 6.317x A380 `s4`), whereas `sweep_wg = 512` (16 warps/CTA) drops to 74,811.53 (`s4`, 5.141x) and 79,872.92 bases/s (`s5`, 5.488x) due to CTA tail-holding register fragmentation.
3. Generator share and CPU `recheck_c` + `fast_d2` verification: across 7 generator shapes (`Q19_WG 128/256/512`, `UT*UP = 65,536`), `sweep_fast` is 74.94%–79.20% of GPU time (79.20% at `Q19_WG = 512`, matching Intel's 78%) and `q19 + q20` is 20.31%–24.64%. Pure-CPU 64-step RFC 1321 MD5 recheck of all 26,404 Block-1 solutions gives `block1_bad = 0, duplicate_ihvs = 0`, and CPU `fast_d2` matches GPU `d2fscan_batch` on all 53,459 legal candidates and all 3 `s32` (`st = 48, 49, 50`) records.
- [Return #4489](/projects/md5/return/4489): proposed. Run 1018 kernel_s4 production: A380 36,694,343 IHVs (2,535.5 IHV/s with a suspension), UHD 770 6,946,246 (481.7 IHV/s); s32 2,203 + 408, full 0; CPU recheck 0 bad, 0 dup, records identical.
