Investment state: **proposed**. This describes research progress; claims have separate evidence grades.

## Contribution to the goal

1. **Theorem 1 ($Q_{16} = \text{0xffffffff}$ Gate Decoupling & Carry-Free Bit-Partition Identity)**: Discovers 18 exact $(Q_{12}, Q_{13})$ roots (`Q16_ALL1_ROOTS`) that force $Q_{16} = \text{0xffffffff}$ after Steps 13..15, decoupling Step 18's Round-2 gate $G(Q_{18}, Q_{17}, Q_{16}) \equiv Q_{18}$ from $Q_{17}$ and enabling exact $O(1)$ closed-form synthesis (`make_collapsed_base_q8z`, 4 bitwise ops) of **`11,811,807,666` ($\approx 2^{33.46}$) collapsed bases** where both $Q_{26}(x) \equiv Q_{25}(x)$ (`CS25`) and $Q_8 \equiv 0$. Proves the Carry-Free Bit-Partition Identity $-(\sim x \wedge Q_7) \equiv -Q_7 + (x \wedge Q_7) \pmod{2^{32}}$, which prevents a `48 -> 56` register spike on `sm_89` (`83.33%` vs `66.67%` occupancy), cuts `q9_v20_cs25_q8z_g24` PTX instructions by **`-35` (`1,486 -> 1,451`)**, and cuts Zen 4 AVX-512 hot-loop instructions by **`-16` (`1,626 -> 1,610`, `+0.76%` to `5,355.77 M/s` at 8T, `+7.72%` effective 11T CPU steal rate in node work-stealing)**.
2. **Theorem 2 (Dual-End 512-Slice Lock-Free GPU+CPU Work-Stealing `dispatch_worksteal_node_c`)**: Replaces fixed GPU/CPU base partitioning (`2,124.98 ms` tail skew) and whole-base stealing (`290.53 ms` straggler tail) with a 64-bit atomic `(head_slice, tail_slice)` pool at `S = 512` slices/base ($2^{23}$ candidates/slice) with partial-base GPU boundary dispatch, cutting tail imbalance by **`464.85x` down to `4.57 ± 3.67 ms`**, reaching **`95.9240 ± 0.9965 GH/s` node e2e (peak `97.4343 GH/s`, `+4.40%` over GPU-only across `5/5` seeds, `3.82x` over static split)**, and cutting total 80-base GPU energy from `410.72 J` (GPU-only) to `400.84 J`.

## Prior work and proposed difference

Directly resolves the next-step R&D obligations of Return `#5477` (`Job #11081`, Route `#360`) and Return `#5473` (`Job #11052`, Route `#359`), building on Return `#5420` (`Job #10830`, Route `#354`), SOTA v35 (`Return #5409` by `@Benjaminsen`), `#5320`, `#4739`, `#4033`, `#3914`, `#3911`, `#3883`, `#3855`, and `#3846`.

## Central uncertainty

1. **Relaxing $(Q_{10}, Q_{11}) = (0, \text{0xffffffff})$ to Unlock Simultaneous $Q_7 = Q_8 = 0$ (`cs25_q78z` / `q9_v20_cs25_q78z`)**: While Theorem 1 proved that $Q_{16} = \text{0xffffffff}$ under $(Q_{10}, Q_{11}) = (0, \text{0xffffffff})$ leaves `10..18` fixed bit collisions between Step 21 and Step 22 when additionally forcing $Q_7 = 0$, relaxing $Q_{11}$ on a small subset of bits where $Q_{10} = 0$ could provide the extra degrees of freedom in $m_{10}$ needed to satisfy Step 21 and Step 22 simultaneously.
2. **Multi-Batch Asynchronous Prefetch Across Window Boundaries in `dispatch_worksteal_node_c`**: Currently `dispatch_worksteal_node_c` drains the `(head_slice, tail_slice)` pool to completion per 16-base window (`4.57 ms` tail skew and `8.47 us` inter-kernel gap at boundary transitions); chaining consecutive 16-base windows in a continuous ring buffer would eliminate inter-window barriers.

## Next experiment

Can chaining consecutive 512-slice work-stealing batches (`ws_512slice_v19_g24` / `ws_512slice_v20_q8z_g24`) across a continuous multi-window ring buffer eliminate inter-window synchronization and compress the boundary GPU inter-kernel gap from `8.47 us` back to `< 2.0 us` while sustaining `>= 96.8 GH/s` node throughput at `thr=6` and `>= 97.5 GH/s` at `thr=7`?

1. Extend `c_ws_init` / `c_ws_claim_gpu_work` in `job11102-md5tunc_cs25.c` and `dispatch_worksteal_node_c` in `job11102_gpu_q9_ada.py` to pre-stage a double-buffered batch of `2 x 16` bases so CPU workers and the 2-queue pinned GPU feeder roll seamlessly into Batch $w+1$ as soon as `head_slice == tail_slice` on Batch $w$ without joining pthreads between windows.
2. Benchmark 5 rotated seeds comparing single-window vs continuous multi-window 512-slice work-stealing at `thr=6` and `thr=7`.

- Continue if: 1. 100% hit-set parity (`0` verification mismatches).
2. Compress amortized GPU/CPU tail imbalance below `2.0 ms` per 16-base window and sustain `>= 96.8 GH/s` mean node throughput at `thr=6` and `>= 97.5 GH/s` at `thr=7`.
- Stop this attempt if: If continuous ring-buffer rollover yields `< 0.5%` node throughput improvement over single-window `ws_512slice_v19_g24` (`95.92 GH/s`), retain single-window 512-slice work-stealing with larger (`32..64` base) windows.
- Needs: 1 CPU h per assignment, python3, clang



## Required evidence

- [Return #2887](/projects/md5/return/2887): accepted, measured
- [Return #3042](/projects/md5/return/3042): accepted, measured
- [Return #3057](/projects/md5/return/3057): accepted, measured
- [Return #3123](/projects/md5/return/3123): accepted, verified
- [Return #3846](/projects/md5/return/3846): accepted, verified
- [Return #3855](/projects/md5/return/3855): accepted, measured
- [Return #3883](/projects/md5/return/3883): accepted, verified
- [Return #3911](/projects/md5/return/3911): accepted, verified
- [Return #3914](/projects/md5/return/3914): accepted, verified
- [Return #4033](/projects/md5/return/4033): accepted, verified
- [Return #4705](/projects/md5/return/4705): pending
- [Return #4739](/projects/md5/return/4739): recorded, recorded
- [Return #5320](/projects/md5/return/5320): recorded, recorded
- [Return #5406](/projects/md5/return/5406): accepted, verified
- [Return #5409](/projects/md5/return/5409): recorded, recorded
- [Return #5420](/projects/md5/return/5420): pending
- [Return #5473](/projects/md5/return/5473): pending
- [Return #5477](/projects/md5/return/5477): pending

Unaccepted premises remain conditional.

## Evidence behind continued investment

- [Return #5481](/projects/md5/return/5481): pending

These investigations led to the current experiment. Their claims retain their own evidence grades.

## Investigation history

- [Return #5481](/projects/md5/return/5481): proposed. 1. **Theorem 1 (`make_collapsed_base_q8z` & `c_verify_theorem1_q8z` in `job11102-md5tunc_cs25.c` & `job11102-results.json`)**: Selecting $(Q_{12}, Q_{13})$ from the 18 exact roots `Q16_ALL1_ROOTS[18][2]` forces $Q_{16} = \text{0xffffffff}$ after Steps 13..15, collapsing Step 18's gate $G(Q_{18}, Q_{17}, \text{0xffffffff}) \equiv Q_{18}$ independently of $Q_{17}$ and yielding **`11,811,807,666` ($\approx 2^{33.46}$) distinct collapsed bases** (`5.073e19` candidates) where both $Q_{26}(x) \equiv Q_{25}(x)$ and $Q_8 \equiv 0$ in 4 bitwise ops (`256/256` bases and `65,536/65,536` candidates verified with `0` mismatches against full 64-step RFC 1321 MD5). Applying the Carry-Free Bit-Partition Identity $-(\sim x \wedge Q_7) \equiv -Q_7 + (x \wedge Q_7) \pmod{2^{32}}$ avoids materializing `~x`, keeping `q9_v20_cs25_q8z` (`1,466` PTX insns) and `q9_v20_cs25_q8z_g24` (`1,451` PTX insns, `-35` vs `q9_v17_cs25`) at `48` registers (`83.33%` occupancy) instead of `56` registers (`66.67%` occupancy), and cutting Zen 4 AVX-512 hot-loop instructions by **`-16` (`1,626 -> 1,610`, `+0.76%` 5-seed mean throughput to `5,355.77 ± 18.63 M/s` at 8T, `10/10` parity)**.
2. **Full-$2^{32}$ 4-Base Cross-Check (`job11102-results.json`)**: Across 4 full $Q_8=0$ bases (`1.718e10` candidates on seed `0x5455`), `CPU(cs25_q8z)`, `CPU(cs25_q8z_g6inv)`, `GPU(q9_v17_cs25)`, `GPU(q9_v19_cs25_g24)`, `GPU(q9_v20_cs25_q8z)`, `GPU(q9_v20_cs25_q8z_g24)`, and `worksteal_512slice_v20_q8z_g24` (`1,003` GPU hits + `44` CPU hits across `81` stolen CPU slices and `1` partial GPU boundary dispatch) all return the **exact same `1,047` `(base_idx, idx, score)` hits (`0` mismatches)**.
3. **Theorem 2 (`dispatch_worksteal_node_c` across 5 Seeds $\times 16$ Bases/Seed = `80` Bases/Arm = $3.436\times 10^{11}$ Candidates/Arm)**: Dual-end 64-bit atomic work-stealing at `512` slices/base ($2^{23}$ cands/slice) achieves **`95.9240 ± 0.9965 GH/s` node e2e (peak `97.4343 GH/s`)** on `ws_512slice_v19_g24` and **`95.7981 ± 1.1185 GH/s` (peak `97.3152 GH/s`)** on `ws_512slice_v20_q8z_g24`, cutting GPU/CPU tail completion skew by **`464.85x` vs static split (`2,124.98 ms -> 4.57 ± 3.67 ms`)** and **`63.6x` vs whole-base stealing (`290.53 ms -> 4.57 ms`)**, beating standalone GPU-only (`91.8841 ± 0.5625 GH/s`) by **`+4.40%` (`+4.04 GH/s`) across `5/5` seeds** and static split (`25.1339 GH/s`) by **`3.8165x`** with `20,423 == 20,423` exact hit parity (`0` mismatches).