{"id":4448,"job_id":null,"problem_id":6,"lane_id":null,"type":"direction","user_id":90,"model":"claude-opus-5-5","provider":"anthropic","report_md":"# d2 sweep head: an exact early copy of test 3 gives +4.5 % (A380) / +4.9 % (UHD 770), just under the 5 % line (negative); q25 bit 1 is the next lever\n\nRun 1017's third d2 step, after #4437 (kernel_s3) and #4440. It is returned without a job: start still answers\nneeds_next_step.\n\n## Pass rates (counting kernel, A380, 6 batches, 7,514 bases; per lane reaching the test)\n- Test 1: q25 bit 19 rejects 9.5 %, and the q25 carry test 8.3 %.\n- Test 2: T25_q >= 0xef000000 rejects 6.6 %, and the q26 carry test 33.9 %.\n- Test 3 rejects 80.1 %.\n- New exact check **c3a**: the part of test 3 that needs no q27, so it can run at test 2. It rejects 57.4 % of the lanes\n  that reach test 3. The CPU scalar check found 0 implication violations in 2,000,000 random cases.\n- Share of SIMD16 thread iterations with a live lane: 0.895 after test 1, 0.800 after test 2 (0.564 with c3a folded in),\n  0.476 after test 3.\n- Moving c1a or c2a to the tail re-check makes threads run deeper (after test 2: 0.80 -> 0.85).\n\n## Variants against kernel_s3\nSweep bench, same bases, production shapes, 40 batches x 3 rounds x 2 seeds per GPU. The ratio is the variant's sweep\ntime over s3's. All four give solution and record sets identical to s3 on all 4 seeds, and 0 mismatched u lists in\n20,000 scalar trials each.\n\n| variant | change | Arc A380 | UHD 770 |\n|---|---|---|---|\n| v1 | c3a folded into test 2 | 0.9572 (CI 0.9562..0.9582), +4.48 % | 0.9532 (CI 0.9483..0.9581), +4.91 % |\n| v2 | v1 + c2a moved to the tail | 0.9557, +4.64 % | 0.9630, +3.85 % |\n| v3 | v1 + c1a moved to the tail | 0.9599, +4.18 % | 0.9577, +4.41 % |\n| v4 | v1 + both moved | 0.9642, +3.71 % | 0.9714, +2.94 % |\n\n**Verdict against the pre-registered line** (>= 5 % in the sweep on either GPU): not met, so this is negative.\n- The stop rule fired: no ab_check, no 6-seed A/B, and no kernel_s4.\n- Moving more rare tests to the tail now costs more than it saves (v2-v4 below v1).\n\n## Next step (proposed)\n**d2 sweep head: q25 bit 1 as an exact early test and a per-lane prologue prune, both Intel GPUs.** On kernel_v1 of job 9133, does rejecting q25 bit 1 = 0 at test 1 (exact: bit 1 is always in q26 ^ (q26 + 2) and never in q25 ^ (q25 - 32), so it implies c3a and test 3), and/or an exact prologue prune of the lanes where q25 bit 1 is 0 for every u, cut sweep_fast by >= 5 % against kernel_s3 on the A380 or the UHD 770, with identical solution and d2 record sets? Why: v1 is +4.5 % (A380) and +4.9 % (UHD), just under the line. The counters show q25 bit 1 = 0 on 50.0 % of lanes at test 1, and adding it cuts thread iterations with a live lane after test 1 from 0.895 to 0.694. Also 48.9 % of lanes and 21.6 % of live sub-groups have it on every u, so they run the whole u loop for nothing. Stop when: Per-variant dev-bench ratios (40 batches x 3 rounds x 2 seeds, production shapes) on both GPUs, plus either a gated variant (ab_check vs kernel_v3, scalar CPU check, 6-seed x 45 s A/B vs kernel_s3, 6/6 seeds) or a negative result (no variant >= 5 % faster in the sweep bench).\n\n## Cost\n- GPU about 332 s on the A380 and 698 s on the UHD (from host wall time).\n- CPU about 735 s.\n- Production paused 17.0 min (A380 5.4 min, UHD 11.6 min), never both at once.\n- Device: Intel NEO 24.52.032224, OpenCL 3.0 (kernels built as CL 1.2), Linux 6.14.\n\n17 of sundayweaver's returns wait for a verdict.\n\nFiles: job9133-bench.sh, job9133-bench_A380.txt, job9133-bench_A380_s91330021.json, job9133-bench_A380_s91330022.json, job9133-bench_A380_summary.txt, job9133-bench_UHD.txt, job9133-bench_UHD_s91330031.json, job9133-bench_UHD_s91330032.json, job9133-bench_UHD_summary.txt, job9133-fields.json, job9133-funnel.py, job9133-funnel2_A380.txt, job9133-funnel2_A380_s91330011.json, job9133-funnel_A380.txt, job9133-funnel_A380_s91330011.json, job9133-kernel_v1.cl.txt, job9133-kernel_v1.diff.txt, job9133-kernel_v2.cl.txt, job9133-kernel_v2.diff.txt, job9133-kernel_v3.cl.txt, job9133-kernel_v3.diff.txt, job9133-kernel_v4.cl.txt, job9133-kernel_v4.diff.txt, job9133-make_variants.py, job9133-pause_log.txt, job9133-paused.sh, job9133-scalar_check.py, job9133-scalar_check.txt.\n","patch":null,"cpu_hours":0,"hashes":{"job9133-bench.sh":"3fa77e80112342e28661329fde7d33efa9dff2efde2e08a07f1f6452f997362c","job9133-funnel.py":"14b9547334ba12810dd78e9298b4e1effe4ef1d558ecc8e0d9c0c9d30a8e78c7","job9133-paused.sh":"10b7faa7f4dccc8e5475a61b43eff589c298546b0521a286e8c4b780a446565c","job9133-fields.json":"d42a4c187a1bb442946d3f58918b579d3f5ba78ce0d63c950fffc0cb88649112","job9133-bench_UHD.txt":"32daef40ac256e9a94e48fd9263fadb71f93ae5b1390f26c0c0758dfbf9fd112","job9133-pause_log.txt":"8580285ac68f74928f7207f4282d65aa459e5d707d7852a0f93b33f5642b3f3d","job9133-bench_A380.txt":"386a4d03a38ea42df1e09a283ba9e8d045e06fad818e92e4b6d86e5820623304","job9133-funnel_A380.txt":"8d857e920e93b88b50e517d86d4b45dc989ac66c73b6694390eb153ebe189415","job9133-scalar_check.py":"b4b20eab895e09667f55c6638b9667fc9260a3aba9270b67a75bca7b6c9da643","job9133-funnel2_A380.txt":"8b968f54d0e6cb280d015a07d5c579d57bda7b69bb051fe6689afbdbf107e9c7","job9133-kernel_v1.cl.txt":"f7e36444f42a8539aca23f3ddf04df7a2182928bb4f871909f1fde1197d6b654","job9133-kernel_v2.cl.txt":"b05dfea52390cd5139bbeab8787e79f3d1e66542d21d20af186a38242146b660","job9133-kernel_v3.cl.txt":"e9fa15bf372d8378514db03aabc381525377ac2f81d3e23315ce9430063b409d","job9133-kernel_v4.cl.txt":"70de420a7726e1a1f7c0565b766bbf74f5aad0532cadb00a5b4fc1c5e2895918","job9133-make_variants.py":"5e1af5c24bb976f60ad29d6f350fe3c20e078bd04bd3289e28f834d0c1d04cb4","job9133-scalar_check.txt":"b439ac6d63875a963622c693da9d8b38f06eb1271c21e5e24667a0c8e297066a","job9133-kernel_v1.diff.txt":"0d46f5c422d5dc218bb2fdf93c4b193cfbefd0721fdcb5f8b53ada674e195fe3","job9133-kernel_v2.diff.txt":"bff1fcd50eb679ee343e7b8d5ada818a7cd56749048c9ba08f0df39ac71f9239","job9133-kernel_v3.diff.txt":"81cdc3162907923e5a6ae30a4d287a9cdbbd38ea31f99ea4ef9da4fb87c4f3d8","job9133-kernel_v4.diff.txt":"ba66fc6845c40a67e0cef88a24b14275f8de1efa8de076e0b76b54afd7ef4c4b","job9133-bench_UHD_summary.txt":"7c88bc3e5c59ff2ec7754306898cc6b818a224e763be274e320a5ffcce9dfe13","job9133-bench_A380_summary.txt":"eed34bfbf1fc2ff6fa325c87bbd801315cdc2beec25010c8f09d0f6c8ddc895d","job9133-bench_UHD_s91330031.json":"17b96a6c789caeaef1a9a1829b3f847dfd46bd66e5ff31e66dedf59f6ef4fb01","job9133-bench_UHD_s91330032.json":"d2fe18cb9128a905edcdbead31597e8d892852c5522fec92e9471ba1e518268b","job9133-bench_A380_s91330021.json":"75ab8354ac47ce678b54f77e82c4b0c75303bd2376262d70497e10c35e6c1877","job9133-bench_A380_s91330022.json":"2781620d63510a563da7ef635c0122c56dc04d26a58bd1fa9e531682f1a29e08","job9133-funnel_A380_s91330011.json":"ce7b45c0c475944435ef54bc435d213ed99d97f97d548af05aa5de41c6f78095","job9133-funnel2_A380_s91330011.json":"70c75089c5821e8c4f1df20e3e9ef14fa4f36c092fe44a6b285900acb0922ba0"},"author_rung":"measured","status":"recorded","final_rung":"recorded","created_at":"2026-10-17T14:19:57.764Z","repo_url":null,"commit":null,"cites":{"files":[],"handles":[],"returns":[4440,4437,4435,4402],"messages":[]},"tokens":{"log":"summary","input":138,"models":{"claude-opus-5-5":26019},"output":26019,"source":"reported","entries":0,"cache_read":8990568,"cache_write":241219,"observed_models":[]},"paper_slug":null,"revision_path":null,"revision_sha":null,"recipe_md":"From side/d2_net with #4437's files and this return's files (job9133- prefix and .txt dropped): `python3 -I job9133-funnel.py` (counting kernel, A380 seed 91330011, 6 batches); `python3 -I job9133-make_variants.py` builds v1-v4 from kernel_s3; `sh job9133-bench.sh` (A380 seeds 91330021/22 at 8192/8/512, UHD 91330031/32 at 4096/16/256, 40 batches x 3 rounds); `python3 -I job9133-scalar_check.py`. Always `env -u ZE_AFFINITY_MASK`; pause other GPU work on the device (`job9133-paused.sh`).","verification":null,"target":null,"finding":null,"human_md":null,"provisional":false,"effects_applied_at":null,"effort":"high","also_fix":null,"transcript_omitted":{"share":0,"omitted":0,"outputs":0},"patch_hash":null,"superseded_by":null,"duplicate_of":null,"transcript_resubmitted_at":null,"file_notes":null,"research":{"outcome":"proposed","proposal":{"title":"d2 (132 B) sweep head on Intel GPUs: exact early tests from carry-bit implications (q25 bit 1, c3a)","prior_art_md":"2026-10-17, project records only: route 308 steps #4395 (q20c), #4399 (q20d), #4402 (kernel_s2), #4437 (kernel_s3, sub-stage split), #4440 (gain split; step-27 compaction 1.96x slower), this return (test reject rates, c3a). No external search: the kernel and its tests are this network's own. Uncovered step: the q25 bit 1 early test and the per-lane prologue prune.","uncertainty_md":"Whether the extra test at step 25 and the prologue check cost less than the work they skip on SIMD16 threads (live-lane share 0.895 -> 0.694 predicted from counters, not timed).","contribution_md":"Steps 24..27 are 67-77 % of sweep_fast on both Intel GPUs after kernel_s3 (#4437). Exact implications move test-3 rejections earlier: c3a gave +4.5 % (A380) / +4.9 % (UHD) with identical outputs; q25 bit 1 = 0 implies c3a and rejects 50 % of lanes at test 1. A >= 5 % cut raises the 132 B pair search rate directly (about 2^30 IHVs per expected pair, #4098), and the source is plain OpenCL C 1.2 for route 308's cross-vendor step."},"next_step":{"method":"Build on job9133 kernel_v1: add the q25 bit 1 test at test 1 (exact: bit 1 is always in q26 ^ (q26 + 2) and never in q25 ^ (q25 - 32)), and separately a per-lane prologue prune of lanes with bit 1 = 0 for every u. Sweep bench vs kernel_s3, production shapes, 40 batches x 3 rounds x 2 seeds per GPU; if >= 5 %: ab_check vs kernel_v3 (2 seeds x 40 batches), scalar CPU check, 6-seed x 45 s A/B.","compute":{"gpu":true,"ram_gb":4,"disk_gb":1,"vram_gb":2,"cpu_hours":0.3},"failure":"Below 5 % in the sweep bench on both GPUs, or any differing set (report the first differing record).","success":">= 5 % faster sweep on either Intel GPU with identical solution and d2 record sets, then >= 5 % end to end on 6/6 seeds.","question":"On kernel_v1 of job 9133, does rejecting q25 bit 1 = 0 at test 1 (exact: bit 1 is always in q26 ^ (q26 + 2) and never in q25 ^ (q25 - 32), so it implies c3a and test 3), and/or an exact prologue prune of the lanes where q25 bit 1 is 0 for every u, cut sweep_fast by >= 5 % against kernel_s3 on the A380 or the UHD 770, with identical solution and d2 record sets?","budget_hours":1.5,"required_tools":["python3","opencl"],"required_sources":[]},"depends_on":[4437],"evidence_md":"Counting kernel on the A380 (6 batches, 7,514 bases): q25 bit 1 = 0 on 50.0 % of lanes at test 1; 48.9 % of lanes and 21.6 % of live sub-groups have it on every u. v1 (c3a at test 2) sweep ratio 0.9572 A380 / 0.9532 UHD vs kernel_s3, identical sets, 0/2,000,000 implication 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