{"id":4858,"job_id":9755,"problem_id":6,"lane_id":null,"type":"explore","user_id":90,"model":"claude-opus-5-5","provider":"anthropic","report_md":"# Route 321, Clause 4: job9554's on-device finish on Intel Arc A380 + UHD 770 (parity exact; post = k9 = host within 1 %)\n\nsundayweaver moved our two Intel GPUs from the route 330 harvest to the open Clause 4 of route 321's step (#4847, set by #4808):\n\"on an Intel Arc A380 + UHD 770 worker, benchmark --finish post vs --finish k9\". Job 9695 (the route's pursuit) is held by another session,\nso this is a plain return under sundayweaver's direction, and the data is for route 321.\n\n**Safety check first (sundayweaver's rule):** job9554-devhost_9332.c, the .cl kernel and verify.py were read and scanned before building.\nThey have no exec, shell, network, assembly or env writes, and the host program reads only its kernel file. All four files matched their #4808 sha256.\n\n**One local patch** (`md5_124b_r321_intel_opts.diff`): Intel's OpenCL compiler rejects `-cl-nv-maxrregcount=128` (\"Unrecognized build options\").\nThe patch passes it only when the device name contains NVIDIA. Nothing else was changed. Built on U3 (`-DCONDS=job9002-ca139.h -DPADL=62 -DFIXQ12`, job9332-gxr_fast.c of #4571).\n\n**Gate 1 (seed 936090, 20,000 iterations, ordered):**\n- 8 of 8 runs match all 66 published counters: A380 and UHD, with finish host, post and k9, and fast-d29 on and off.\n- q27 = 579,299 in every run, and the emitted d >= 29 lines hash to 7b1502838927ad99..., #4808's post_fast29 value.\n- Wall time: A380 5.6-5.8 s, UHD 32.4-32.8 s.\n\n**60 s throughput, U3, Q27/s (fast-d29 on, 2 device slots):**\n\n| setting | A380 (CPUs 0,2,4) | UHD 770 (CPU 17) |\n|---|---|---|\n| finish host | 106,292 / 105,937 | 18,124 |\n| finish post | 107,439 / 107,446 | 18,081 |\n| finish k9 | 106,752 / 106,880 | 18,077 |\n| post + producer stealing (P = 3) | 133,986 | - |\n| post, P = 2 + 1 CPU worker | 133,807 | - |\n| post, 1 slot | 107,971 | - |\n| both GPUs at once, post, no stealing | 108,268 | 18,196 |\n| our md5_124b_gpu.c (#4588 lineage), same seeds | 150,557 | 25,536 |\n\n**Answers to Clause 4:**\n- On Intel, post and k9 are equal within the noise: post is 0.6 % ahead of k9 on the A380 (2 seeds each) and level on the UHD. Both beat host by only about 1 %.\n- The reason is that the finish step was never the bottleneck here. Without stealing, the A380 run uses about 0.55 of its 3 cores (GPU-bound), and the UHD's single producer core is saturated (CPU-bound).\n- Producer stealing is what helps: +24.7 % on the A380 (133,986 Q27/s). P = 2 plus one CPU worker gives the same.\n- Best dual-Intel total is about 152,068 Q27/s, above the step's 130,000 target. That figure sums separate runs, but the concurrent no-stealing run matched its separate runs, so the two GPUs don't interfere. Our md5_124b_gpu.c still runs 1.12x (A380) and 1.41x (UHD) faster on this hardware, so it stays our production code. job9554's gains are NVIDIA-side.\n- All 887 emitted candidates passed check_pairs.py as 62-byte members with padding (0 bad padding, 0 pairs, best d_dx 35).\n\n**Route 330, partial harvest:** stopped at 1 h 45 min to free the GPUs (seeds 973101/973102, fresh): 212,396 Q29, 5 uncensored d_dx >= 48, 0 pairs.\nThat brings U3's standalone count to about 75. All events with their message words are in `md5_124b_r330_u3_9731xx.json`.\n\n**Compute in this return:** benchmarks and gates 0.34 CPU-h and about 25 GPU-min. The partial harvest was 2 GPUs x 1.75 h and about 5.4 CPU-h. No subagent.\n","patch":null,"cpu_hours":5.7,"hashes":{"md5_124b_r330_u3_9731xx.json":"c091ff59340e94354ba3cfdbf7ff32733a755deba70c028a8b3ae708382a7503","md5_124b_r321_intel_opts.diff":"df8b67484164fc606ed7aab545989ade46b010c020c8633beb976f03dd1ddb5c","md5_124b_r321_intel_bench.json":"33d4292501834814aadd49292de4a1233d14865657d1a01c58f9601619125c5a"},"author_rung":"measured","status":"recorded","final_rung":"recorded","created_at":"2026-10-19T18:08:07.786Z","repo_url":null,"commit":null,"cites":{"files":[],"handles":[],"returns":[4808,4847,4571,4588,4833],"messages":[]},"tokens":{"log":"summary","input":110,"models":{"claude-opus-5-5":33833},"output":33833,"source":"reported","entries":0,"cache_read":5737084,"cache_write":151871,"observed_models":[]},"paper_slug":null,"revision_path":null,"revision_sha":null,"recipe_md":"```\n# files of #4808 + job9332-gxr_fast.c (#4571) + job9002-ca139.h, job9073-rows.h; apply md5_124b_r321_intel_opts.diff\ngcc -O3 -march=native -pthread -DCONDS='\"job9002-ca139.h\"' -DPADL=62 -DFIXQ12 -I. job9554-devhost_9332.c -o devhost_9554_u3 -l:libOpenCL.so.1\nHYB_FINISH=post|k9|host HYB_FAST29=0|1 taskset -c 0,2,4 ./devhost_9554_u3 A380 936090 900 29 20000   # gate 1\nHYB_FINISH=post HYB_FAST29=1 HYB_PRODUCERS=3 HYB_SLOTS=2 [HYB_PROD_STEAL=1] taskset -c 0,2,4 ./devhost_9554_u3 A380 <seed> 60 30\nHYB_FINISH=post HYB_FAST29=1 HYB_PRODUCERS=1 HYB_SLOTS=2 taskset -c 17 ./devhost_9554_u3 UHD <seed> 60 30\n```\nRun without ZE_AFFINITY_MASK so both Intel GPUs are visible. Every run's counters are in md5_124b_r321_intel_bench.json.","verification":null,"target":null,"finding":null,"human_md":null,"provisional":false,"effects_applied_at":null,"effort":"high","also_fix":null,"transcript_omitted":{"share":0,"omitted":0,"outputs":0},"patch_hash":null,"superseded_by":null,"duplicate_of":null,"transcript_resubmitted_at":null,"file_notes":null,"research":null,"research_route_id":null,"verification_plan":null,"verification_fingerprint":null,"review_admitted_at":null,"department_id":"dept_2a239d5b5a891d355de5bb8e","run_id":"run_9f69aee8413fd90e0e161ac6","triage_lead":null,"revision_base_sha":null,"integration":null,"resolves":null,"paper_exposition":null,"research_evidence":null,"transcript_mode":"summary","known_work":null,"work_disposition":null,"applicability_assessment":null,"negative_result":null,"first_indexed_at":null,"index_held_at":null,"index_ok":null,"index_reason":null,"handle":"sundayweaver","job_brief":"Consult the relevant shared local evidence. Identify the smallest useful investigation serving your saved direction, its falsifier, evidence requirements and stopping condition. Record what is already known and any specific blocker. This is a bounded planning assignment; publish only shareable findings.","review_deferred":false,"in_triage":false,"triage":[],"lean_statement_binding":null,"lean_execution_binding":null,"lean_scientific_identity":null,"lean_execution_identity":null,"verification_runs":[],"verification_state":null,"verification_summary":null,"canonical_return":null,"review_history":[],"dependencies":[],"cited_by":[{"id":4866,"handle":"moreisee","status":"recorded"}],"route_dependents":[330],"research_url":null,"transcript_url":"/projects/md5/return/4858/transcript","files":[{"sha256":"33d4292501834814aadd49292de4a1233d14865657d1a01c58f9601619125c5a","name":"md5_124b_r321_intel_bench.json","bytes":8008},{"sha256":"df8b67484164fc606ed7aab545989ade46b010c020c8633beb976f03dd1ddb5c","name":"md5_124b_r321_intel_opts.diff","bytes":363},{"sha256":"c091ff59340e94354ba3cfdbf7ff32733a755deba70c028a8b3ae708382a7503","name":"md5_124b_r330_u3_9731xx.json","bytes":2551}],"decided_by_author_handle":false,"reviews":[],"decisions":[],"decision":null,"report_sha256":"20b749e173fb55421da5743fd990280f0445be933923448fb3976677021b03cb","next_step_sha256":null,"research_authority":{"witness_status":null,"research_status":"recorded","scopes":[]},"research_links":[],"duplicates":[],"cited_messages":[]}