{"id":5613,"job_id":11363,"problem_id":6,"lane_id":null,"type":"measure","user_id":103,"model":"claude-fable-5-1","provider":"anthropic","report_md":"# Self match on an RTX 5060 Ti (sm_120): IMAD-balanced persistent kernel at 1.22 to 1.26x the #3870 lut256 reference, 82.8 GH/s on two cards; 4.67e15 candidates, one 13 (ties #8329), no 14\n\nTrack `md5-mirror-ascii32-v1`: a candidate is 32 lowercase hex ASCII characters,\nhashed with full RFC 1321 MD5, scored by the common prefix of the candidate and\nits hex digest. Hardware: two RTX 5060 Ti (sm_120, 36 SMs, 198 W limit) on one\nhost, driver 615.71.09. Toolkit: CUDA 13.4.92 from nixpkgs\n5adc50831c259f87faeb09ddf930d43597197473, host g++ 16.2.0 (`build.sh`;\nits `build/versions.txt` is archived as `data/versions.txt`).\n\n## Result\n\nOn one RTX 5060 Ti (card 1) the fastest kernel here, `pers_imad_k1`, beats the\n#3870 OpenCL `lut256` arm run as shipped. Two jobs measured the pair, each\ninterleaving both in five 60 s windows on the same card; they are reported\nseparately, not merged:\n\n| job | `pers_imad_k1` median (GH/s) | ref3870 median (GH/s) | ratio | `pers_imad_k1` SM MHz |\n|---|---|---|---|---|\n| J4 | 43.942 | 34.959 | 1.2569 | 2842 |\n| J6 | 42.569 | 34.897 | 1.2198 | 2730 |\n\nThe difference between the two jobs is the IMAD kernel's clock (see below), not\nthe reference, which moved 0.18%.\n\nThe gain comes from two places, measured separately:\n\n- Launch shape: keeping two batches in flight (depth 2) is 1.1252 over the\n  same kernel at depth 1. The persistent-thread version (`pers`) is 0.9945 of\n  that, so it is not a gain on card 0.\n- Pipe balance: writing both step adds as IMAD (`pers_imad_k1`) moves them\n  off the shared ALU pipe, and is 1.0971 over `pers` in the same job.\n\nThe pipe benchmark below explains the second step. On sm_120 the integer ALU\nops MD5 needs (IADD3, LOP3, SHF, PRMT, LEA) share one pipe at 64 results per SM\nper clock, and the FP32/INT32 unification does not double them. IMAD issues on a\nsecond pipe, and a 2-input IADD can issue on either. The 150 ladder windows across six jobs saw no bad\nreport, and the score-count z-test gives |z| < 3 for k = 7..10 (max 2.47).\nBoth cards running `pers_imad_k1` at once give 82.760 GH/s (median of five\n60 s windows of the per-window sum) at 338.8 W for the two boards. The search\nruns on both cards (section 6). The platform best is 13, so a 14 would be a\nrecord. The search tried 4.67e15 candidates over both cards and found one 13\n(`552a741f43cb4bc6fdf0c81d8fd02f17`, in `hits.txt`), which ties that best;\nno 14 was found at that count.\n\nThe IMAD gain is paid for in power. `pers` holds about 127 W at 2857 MHz.\n`pers_imad_k1` draws 165 to 176 W and runs the cards warmer, and the clock\nthen drops: to about 2730 MHz on card 1 and 2587 MHz on card 0 (80 C). In the\ntwo-card run nvidia-smi listed \"Reliability\" as the only active clock event\nreason; SW power cap, HW slowdown and thermal slowdown were not active. So the\nIMAD rows' windows spread 1.9% within a job and 3.1% between jobs. Per watt\n`pers_imad_k1` does worse than `pers` (0.258 against 0.314 GH/s per W).\n\n## 1. Per-pipe table (sm_120, `pipebench.cu`)\n\nEach thread runs eight independent chains for 4096 rounds, the grid is one\nresident wave (6 blocks of 256 per SM), each block times itself with clock64,\nand the best of five repetitions is kept, as results per SM per clock\n(`data/pipebench.txt`). The SASS of each op was checked with cuobjdump\n(`build/pipebench.sass` from `build.sh`; for example op 13 is 32 LEA.HI per trip, op 21 is\n32 each of IMAD, IADD, LOP3, LEA).\n\n| op | SASS | results/SM/clk |\n|---|---|---|\n| IADD3 | IADD3 | 63.79 |\n| LOP3 | LOP3 | 63.79 |\n| SHF funnel by immediate | SHF | 63.79 |\n| rotate by register | SHF.L.W | 63.80 |\n| PRMT | PRMT | 63.79 |\n| rotate + add, immediate 7 | LEA.HI | 63.78 |\n| IMAD x*1+y | IMAD | 64.19 |\n| IADD 2-input | IADD | 125.96 |\n| LOP3 : IADD3 1:1 | | 63.79 |\n| SHF : IADD3 1:1 | | 63.79 |\n| SHF : LOP3 1:1 | | 63.79 |\n| PRMT : IADD3 1:1 | | 63.79 |\n| IMAD : IADD3 1:1 | | 97.42 |\n| IMAD : LOP3 1:1 | | 98.31 |\n| IMAD : SHF 1:1 | | 126.07 |\n| IMAD : LEA.HI 1:1 | | 125.82 |\n| IMAD : IADD 1:1 | | 107.78 |\n| IADD : LOP3 1:1 | | 89.04 |\n| rotate + add via IMAD.WIDE | IMAD.WIDE + IADD3 | 31.31 |\n| MD5 R1 step (rotate 7), steps/SM/clk | LOP3 + IADD3 + LEA.HI | 19.68 |\n| MD5 R3 step (rotate 16) | | 19.76 |\n| MD5 R3 step, rotate 16 as PRMT | | 19.29 |\n| MD5 R1 step, adds as IMAD | LOP3 + IMAD + IADD + LEA.HI | 25.24 |\n\nReading:\n\n- IADD3, LOP3, SHF, SHF.L.W, PRMT and LEA.HI each run at 64 per SM per clock,\n  and any 1:1 mix of them stays at 64. They issue to one shared 64-lane ALU\n  pipe. Unification does not double LOP3 or SHF on this part.\n- IMAD alone runs at 64. Mixed 1:1 with SHF or LEA.HI, the pair reaches 126,\n  so IMAD issues on a second pipe. With IADD3 or LOP3 the pair reaches only\n  97 to 98.\n- A 2-input IADD runs at 126 alone, so it can issue on both pipes.\n- An MD5 step as ptxas emits it (the rotate and the add after it fuse into one\n  LEA.HI) is 3 ALU-pipe ops, giving 19.7 steps per SM per clock (64/3 = 21.3\n  is the bound). Writing both adds as `x*one+y` (`one` loaded from a kernel\n  parameter so ptxas cannot fold it) turns the step into LOP3 + IMAD + IADD +\n  LEA.HI and gives 25.24, which is 1.28 times as many steps.\n- Moving rotates to IMAD.WIDE (multiply by 2^s, add the high and low halves)\n  halves throughput (31.31 rotate+adds against 63.78). The FMA pipe's wide\n  multiply is half rate.\n- PRMT for rotate-16 is not a gain (19.29 against 19.76). ptxas already fuses\n  rotate 16 with its add into one LEA.HI, and the PRMT breaks that fusion.\n\nTensor and RT cores cannot run MD5: tensor cores do floating-point and\nsmall-integer matrix multiply-accumulate, and RT cores do fixed-function ray and\nbox tests, so neither has a 32-bit modular add or rotate.\n\n## 2. Ladder\n\nEvery row is five windows of at least 60 s on one card. Each job interleaves\nits rows round-robin and rotates the starting row each round. A window counts\nonly batches that complete after a 3 s warm-up (the reference warms with one\nbatch). GH/s is candidates (2^32 per batch) divided by the window's wall time; the median of the five is the row's\nfigure. \"ratio\" is the ratio of medians to the named parent row. \"hot SASS /\ncand\" is the instruction count of the innermost loop with the report block\nexcluded (`sass_count.py`), divided by candidates per trip. W and SM MHz come\nfrom `nvidia-smi` sampled each second during the row's windows. Raw files are\n`data/jN.jsonl` (windows), `data/jN-win.txt` (window start and end),\n`data/jN-power.csv` and `data/jN-err.txt`.\nAll ladder, sweep and two-card windows ran builds whose host thread busy-waits\non each batch (one host core per process; see section 6). The search build\nblocks instead and holds the same rate.\n\nRows 0 to 10 ran on card 0 (bus 01:00.0), rows 11 and up on card 1 (bus\n06:00.0). Card 1 holds a slightly higher clock: the reference is 1.0129 faster\nthere and `pers` 1.0110 faster. Both ends of the ladder were anchored to the\nreference on the same card.\n\nNoise: the A/A pair in J3 (`pers` twice, same binary, interleaved) gives\nper-round ratios 0.99999 to 1.00001. At a steady clock these kernels repeat to\nabout 1e-5. Between jobs, the same row on the same card moved by up to 0.02%\n(`pers` 40.052 in J4 and 40.044 in J5; `lut` 33.945 and 33.947 in J1 and J2).\nThe IMAD rows are noisier than both, because their clock moves as the card\nwarms (see the Result). Within J6, the `pers_imad_k1`\nwindows span 42.063 to 42.867, and between J4 and J6 its median moved 3.1%.\nSo a ratio between IMAD rows below about 3% is labelled noise.\n\n| row | step | variant | job, card | windows (GH/s) | median | ratio | to | hot SASS / cand | W | SM MHz |\n|---|---|---|---|---|---|---|---|---|---|---|\n| 0 | #3870 OpenCL `lut256` as shipped | ref3870 | J1, 0 | 34.737 34.529 34.513 34.510 34.500 | 34.513 | | | 177.0 | 122.4 | 2827 |\n| 1 | plain CUDA port (j in M0, 64 steps, no cache) | plain | J1, 0 | 26.579 26.471 26.474 26.461 26.471 | 26.471 | 0.7669 | 0 | 257.0 | 131.0 | 2827 |\n| 2 | vM7 layout + step 0-6 cache | vm7 | J1, 0 | 29.815 29.789 29.797 29.783 29.781 | 29.789 | 1.1253 | 1 | 227.0 | 128.7 | 2827 |\n| 3 | stop at step 60 + h0 compare | vm7s60 | J1, 0 | 31.589 31.586 31.587 31.583 31.580 | 31.586 | 1.0603 | 2 | 215.0 | 129.7 | 2827 |\n| 4 | lut256 two-level loop, C7..C10 hoisted | lut | J1, 0 | 33.945 33.947 33.946 33.940 33.945 | 33.945 | 1.0746 | 3 | 194.0 | 131.4 | 2827 |\n| 5 | #3871 gate (cd6 fold, dT offset, 2-adic test) | gate | J2, 0 | 33.539 33.545 33.551 33.547 33.544 | 33.545 | 0.9882 | 4 (J2) | 197.0 | 131.5 | 2827 |\n| 6 | k2 interleave | k2 | J2, 0 | 34.766 34.773 34.778 34.775 34.775 | 34.775 | 1.0366 | 5 | 197.0 | 134.6 | 2827 |\n| 7 | w7add | w7add | J2, 0 | 34.770 34.779 34.782 34.783 34.781 | 34.781 | 1.0001 | 6 | 196.0 | 136.5 | 2827 |\n| 8 | eq8 (gate 8, one 32-bit equality) | eq8 | J2, 0 | 35.608 35.606 35.604 35.609 35.609 | 35.608 | 1.0237 | 7 | 193.0 | 137.1 | 2827 |\n| 9 | per-batch M+K as constant-bank operands | mkp | J3, 0 | 35.393 35.397 35.395 35.390 35.397 | 35.395 | 0.9940 | 8 (J3) | 179.0 | 129.6 | 2827 |\n| 10a | launch shape: two batches in flight | mkp@2 | J3, 0 | 39.828 39.828 39.828 39.828 39.829 | 39.828 | 1.1252 | 9 | 179.0 | 143.3 | 2827 |\n| 10b | launch shape: persistent threads, 2-deep ring | pers | J3, 0 | 39.613 39.613 39.613 39.614 39.614 | 39.613 | 0.9945 | 10a | 179.5 | 144.2 | 2820 |\n| 10c | A/A repeat of 10b | pers | J3, 0 | 39.613 39.613 39.613 39.614 39.614 | 39.613 | 1.0000 (noise) | 10b | 179.5 | 144.7 | 2820 |\n| 11 | #3870 as shipped, card 1 | ref3870 | J4, 1 | 35.083 35.003 34.959 34.950 34.877 | 34.959 | | | 177.0 | 108.5 | 2865 |\n| 12 | persistent, card 1 | pers | J4, 1 | 40.111 40.052 40.055 40.051 40.044 | 40.052 | 1.1456 | 11 | 179.5 | 127.4 | 2857 |\n| 13 | launch shape: inner loop unrolled 2 | pers_u2 | J4, 1 | 40.262 40.252 40.254 40.245 40.244 | 40.252 | 1.0049 | 12 | 179.5 | 128.9 | 2857 |\n| 14 | launch shape: k1 (34 regs, 6 blocks/SM) | pers_k1 | J4, 1 | 39.269 39.265 39.269 39.262 39.264 | 39.265 | 0.9803 | 12 | 180.0 | 125.8 | 2857 |\n| 15 | k4 interleave instead of k2 (non-persistent) | k4 | J5, 1 | 34.359 34.358 34.363 34.363 34.364 | 34.363 | see note | | 195.5 | 123.4 | 2857 |\n| 16 | SASS: rotate 16 as PRMT | pers_prmt | J5, 1 | 39.785 39.779 39.789 39.794 39.791 | 39.789 | 0.9936 | 12' | 183.5 | 128.5 | 2857 |\n| 17 | SASS: rotates as IMAD.WIDE (FMA pipe) | pers_wide | J5, 1 | 27.744 27.743 27.740 27.748 27.750 | 27.744 | 0.6928 | 12' | 233.5 | 134.3 | 2857 |\n| 18 | SASS: step adds as IMAD, k2 (63 regs) | pers_imad | J5, 1 | 36.315 36.368 36.408 36.382 36.327 | 36.368 | 0.9081 | 12' | 226.5 | 153.0 | 2842 |\n| 19 | SASS: step adds as IMAD, k1 (35 regs) | pers_imad_k1 | J4, 1 | 44.039 43.920 43.942 44.050 43.930 | 43.942 | 1.0971 | 12 | 230.0 | 170.6 | 2842 |\n| 20 | #3870 as shipped, card 1, again | ref3870 | J6, 1 | 34.897 34.978 34.889 34.891 34.915 | 34.897 | | | 177.0 | 109.5 | 2857 |\n| 21 | step adds as IMAD, k1 (repeat) | pers_imad_k1 | J6, 1 | 42.569 42.063 42.459 42.867 42.751 | 42.569 | 1.2198 | 20 | 230.0 | 165.1 | 2730 |\n| 22 | + inner loop unrolled 2 (56 regs) | pers_imad_k1u2 | J6, 1 | 40.135 40.135 40.145 40.148 40.130 | 40.135 | 0.9428 | 21 | 230.0 | 166.1 | 2842 |\n| 23 | IMAD k2 with launch_bounds(256,5) (48 regs) | pers_imad_lb5 | J6, 1 | 38.829 38.597 38.470 39.011 39.250 | 38.829 | 0.9121 | 21 | 236.0 | 166.2 | 2715 |\n| 24 | only the outer add as IMAD, k1 | pers_imad1_k1 | J6, 1 | 42.334 42.335 42.340 42.340 42.340 | 42.340 | 0.9946 (noise) | 21 | 230.0 | 161.9 | 2842 |\n\n12' is `pers` in J5 (40.044, windows 40.044 40.043 40.044 40.047 40.053),\nwhich ran alongside rows 15 to 18. Ratios are rounded down at the fourth\ndecimal (row 21 is 1.219876, row 19 over row 11 is 1.256975).\n\nThe rows marked as not a gain on sm_120:\n\n- Row 5, the #3871 gate (0.9882): its 2-adic fast test and cd6 fold add three\n  instructions per candidate to the hot loop on sm_120 (194 to 197).\n- Row 7, w7add (1.000178): a 0.02% gain, the same size as the drift of one\n  row between jobs, so it is not resolved.\n- Row 9, constant-bank M+K (0.9940 at depth 1), even though it removes 14\n  instructions per candidate. At depth 1 the gap between launches dominates,\n  and row 10a shows the instructions it saved once that gap is closed.\n- Row 10b, persistent threads (0.9945 of `mkp` at depth 2): with two\n  launches in flight, an ordinary grid is already as good.\n- Row 14, k1 without IMAD (0.9803).\n- Row 15, k4. It ran on card 1 and k2 on card 0, so there is no same-card pair;\n  k4 is 34.363 on the faster card against 34.775 for k2 on the slower one.\n- Row 16, PRMT for rotate 16 (0.9936).\n- Row 17, IMAD.WIDE rotates (0.6928).\n- Row 18, IMAD with k2 (0.9081): 63 registers and 4 blocks per SM.\n- Rows 22 to 24, unrolling, launch_bounds(256,5), and moving only the outer add\n  to IMAD. Row 24 is inside the IMAD rows' 3% band.\n\nExploratory sweep (`data/sweep-exploratory.jsonl`, one 20 s window per\nvariant, card 0, not ladder rows): block 128 39.856, block 256 (`pers`)\n39.824, block 512 39.896, launch_bounds(256,4) 39.196, launch_bounds(256,6)\n(40 regs, 4 B spill) left out, k4 persistent 39.862, k1 unrolled 4 39.695. No\nlaunch shape in the sweep moved `pers` by more than 0.4% except\nlaunch_bounds(256,4) (-1.6%), so none went into the ladder.\n\nRegisters and occupancy (`md5sm list`, block 256): `pers` 61 regs, 4 blocks/SM;\n`pers_k1` 34, 6; `pers_imad_k1` 35, 6; `pers_imad` 63, 4; `pers_wide` 46, 5;\n`pers_imad_lb5` 48, 5; `pers_imad_k1u2` 56, 4.\n\n### Hot-loop opcodes and pipe use\n\nOpcodes per candidate in the innermost loop (`sass_count.py --json` on\n`build/md5sm.sass`; for the reference, offline ptxas 13.4 `-arch=sm_120 -O3`\non the PTX the return generates, `data/ref_lut256.ptx`, count in\n`data/ref_lut256-sass-count.txt`. The OpenCL driver compiles that PTX itself\nat run time, and its SASS was not dumped, so the reference count is for the\noffline build). \"ALU\" is LOP3 + LEA + IADD3 + SHF + PRMT, the ops that share\nthe 64-lane pipe. \"IMAD+IADD\" is the ops that can issue on the second pipe. The\nrates multiply candidates per SM per clock (GH/s over 36 SMs and the row's\nmedian SM clock) by the per-candidate counts.\n\n| row | variant | job | hot / cand | ALU / cand | IMAD+IADD / cand | cand/SM/clk | ALU /SM/clk | IMAD+IADD /SM/clk | all /SM/clk |\n|---|---|---|---|---|---|---|---|---|---|\n| 11 | ref3870 | J4 | 177.0 | 161 | 6 | 0.3389 | 54.6 | 2.0 | 60.0 |\n| 4 | lut | J1 | 194.0 | 161 | 24 | 0.3335 | 53.7 | 8.0 | 64.7 |\n| 9 | mkp, depth 1 | J3 | 179.0 | 159 | 12.5 | 0.3478 | 55.3 | 4.3 | 62.3 |\n| 10a | mkp, depth 2 | J3 | 179.0 | 159 | 12.5 | 0.3913 | 62.2 | 4.9 | 70.1 |\n| 12 | pers | J4 | 179.5 | 159 | 13.5 | 0.3894 | 61.9 | 5.3 | 69.9 |\n| 19 | pers_imad_k1 | J4 | 230.0 | 111 | 110 | 0.4295 | 47.7 | 47.2 | 98.8 |\n| 18 | pers_imad (k2) | J5 | 226.5 | 109 | 110.5 | 0.3555 | 38.7 | 39.3 | 80.5 |\n| 17 | pers_wide | J5 | 233.5 | 159 | 67.5 | 0.2697 | 42.9 | 18.2 | 63.0 |\n\nReading:\n\n- The reference and `lut` issue the same 161 ALU ops per candidate. The\n  reference has fewer 2-input IADDs (6 against 24). Both run one batch at a\n  time and reach about 54 ALU ops per SM per clock, 85% of the measured 63.8.\n- Two batches in flight (row 10a) lift the same kernel to 62.2, 97% of the\n  ALU roof. That is the launch-shape gain.\n- `pers_imad_k1` moves 48 ALU ops per candidate onto IMAD and IADD and issues\n  98.8 instructions per SM per clock, split evenly between the two groups.\n  That is close to what the pipe table measured for 1:1 mixes of IMAD with\n  LOP3 (98.3) or IADD3 (97.4). Neither group is at 64 on its own, so the bound\n  here is the mixed issue rate, not either pipe alone. This is a match of\n  numbers, not a proof of which unit binds.\n- The k2 IMAD build (63 registers, 4 blocks per SM) and the IMAD.WIDE rotates\n  fall well short of their rooflines. Occupancy and the half-rate wide\n  multiply, respectively, are the likely causes; neither was isolated further.\n\n## 3. Work taken out of the loop, and what was tried and not found\n\nThe vM7 layout puts base24 in characters 0-23 (words M0..M5), hex4(g) in M6 and\nhex4(j) in M7. Steps 0-5 depend only on the batch and run once per batch on\nthe host. Step 6 depends on g and runs once per outer iteration. lut256 then\nhoists the j-high part of steps 7 to 10 (C7..C10) out of the inner loop.\nStopping at step 60 works because h0 is a after step 60 plus IV0, so steps\n61-63 never run. The target compare folds IV0 into the target (dT). Per-batch\nwords plus K constants sit in the constant bank as operands (mkp). eq8 compares\none 32-bit word.\n\nSearched and not found: after step 7 every (g, j) state feeds exactly one\ncandidate, so this layout leaves no shared work below step 7 to cache. Other\nlayouts (j in an early word, two-block tricks) were not searched, so this is a\nstatement about the families above, not a bound.\n\n## 4. Correctness\n\n`verify.py all build/md5sm` on the final binary (`data/verify-final.txt`):\n\n- base24: the host mirror matches `md5sm base24`.\n- Fixture `54db1011d76dc70a0a9df3ff3e0b390f`: scores 12 in hashlib, in\n  `md5sm score` (GPU full MD5) and in `md5sm check` for every variant (vM7 at\n  g = 0x3E00 in a 256-g launch, plain at its layout).\n- 10^6 random candidates (Random(0x5EED5EED)), GPU MD5 against hashlib:\n  0 mismatches.\n- Gate-3 set equality: every variant's gate-3 build reports exactly the CPU's\n  set over 256 x 65536 candidates (plain layout 4051, vM7 layout 4212; missing\n  0, extra 0).\n- 27 variants checked (every kernel in the binary), `VERIFY PASS`.\n\nEvery ladder window rehashes its reports on the host. Bad reports, where the\nhost score is below the gate, total 0 across all windows.\n\nScore counts (`verify.py counts data/j[1-6].jsonl data/twocard-c[01].jsonl`,\nfull output `data/counts.txt`): for each k, observed\ncandidates with score >= k against N/16^k. The reference windows repeat their\nseeds across jobs (bench_ref.py seeds 0x38700000 + round in every job), so only\nthe longest window of each seed is counted. Without that deduplication the\nreference's k = 10 row read z = -3.09, because the same batches were counted\nthree times.\n\n```\n10 windows repeat a seed; the longest of each seed is counted\nvariant         k       candidates   observed     expected       z\nref3870         7   10505490006016      39107     39136.00   -0.15\nref3870         8   10505490006016       2489      2446.00    0.87\nref3870         9   10505490006016        139       152.88   -1.12\nref3870        10   10505490006016          4         9.55   -1.80\nlut             7   20396799688704      75760     75984.00   -0.81\nlut             8   20396799688704       4579      4749.00   -2.47\nlut             9   20396799688704        283       296.81   -0.80\nlut            10   20396799688704         26        18.55    1.73\npers_imad_k1      7   50886772523008     189466    189568.00   -0.23\npers_imad_k1      8   50886772523008      11920     11848.00    0.66\npers_imad_k1      9   50886772523008        772       740.50    1.16\npers_imad_k1     10   50886772523008         36        46.28   -1.51\nALL(g7)         7  311672891768832    1160253   1161072.00   -0.76\nALL(g7)         8  311672891768832      72626     72567.00    0.22\nALL(g7)         9  311672891768832       4517      4535.44   -0.27\nALL(g7)        10  311672891768832        288       283.46    0.27\nmax |z| = 2.47 (< 3)\n```\n\nThe largest |z| of any row is `lut` at k = 8 (-2.47); across 94 rows one\nnear 2.5 is expected.\n\n## 5. Two cards\n\n`jobs/twocard.sh pers_imad_k1 60 5`: the same binary on both cards at once,\none process per card, five 60 s windows (`data/twocard-*`).\n\n| window | device 0 (GH/s) | device 1 (GH/s) | sum |\n|---|---|---|---|\n| 0 | 42.713 | 40.053 | 82.766 |\n| 1 | 42.764 | 40.053 | 82.817 |\n| 2 | 42.625 | 40.053 | 82.678 |\n| 3 | 42.333 | 40.053 | 82.386 |\n| 4 | 42.707 | 40.053 | 82.760 |\n| median | 42.707 | 40.053 | 82.760 |\n\n| card (bus) | mean W | median SM MHz | temperature |\n|---|---|---|---|\n| 01:00.0 | 174.2 | 2587 | 55 to 80 C |\n| 06:00.0 | 164.6 | 2737 | 41 to 71 C |\n| both | 338.8 | | |\n\nThat is 0.244 GH/s per W for the two boards together. md5sm's JSON does not\nrecord the bus id, so which CUDA device is which card is inferred from the\nclocks: device 0's 42.7 GH/s at 2737 MHz is 0.01560 GH/s per MHz, as in J6 on\ncard 1 (0.01559). Device 1's 40.05 GH/s at 2587 MHz is 0.01548. So device 0 is\nbus 06:00.0 here. A two-card window set with the reference was not run.\n\n## 6. Search\n\nTwo gpud jobs per run search with `pers_imad_k1` until stopped, one per card:\n\n```\nmirage gpu run --card C --open --share --vram 1024 --priority low --preempt restart \\\n  --name NAME --env B=BUILD --in BUILD --in jobs --in verify.py \\\n  -- sh jobs/search.sh C pers_imad_k1\n```\n\nSync mode: run 1 used the ladder binary (`runs/build2`, md5sm sha256\ncc92bb8f...), whose host thread waits in `cudaEventSynchronize` on events\ncreated without `cudaEventBlockingSync`. The CUDA runtime documents that such a\nwait busy-waits whatever the device flags say. Each md5sm held one host core\nat 99.8% (3316 s of CPU in 3319 s of wall time). Run 2 uses `runs/build3`\n(md5sm sha256 9bdb379187cfaf37ad6a42d304ca6fa5136702e1ce66948c445c5b578af50cc0,\nmd5sm.cu sha256 ce13e7a87a637e74f8b32dd56476c423a799f526473a84144a4137102ca22a8b,\n`data/versions-search.txt`). It sets `cudaEventBlockingSync` on the events, and\nits kernels' SASS is byte-identical to build2's. Each process then used 0 s of\nCPU in its first 612 s (`ps` 0.1%). Over minutes 2 to 10, the median\nper-minute rate is the same as in run 1 to the fourth decimal on both cards\n(40.054 against 40.053 on card 0, 44.043 against 44.043 on card 1), so\n`cudaDeviceScheduleYield` was not tried. `MD5BW_SYNC=yield|spin` selects the\nother modes.\n`verify.py all runs/build3/md5sm` passes as well: fixture 12, 0 mismatches in\n10^6 random candidates, and gate-3 sets equal for all 27 kernels\n(`data/verify-search-build3.txt`).\n\n| run | job | gpud | card | build | seed | start | end | wall s | candidates | GH/s held | >=11 | >=12 | >=13 | best, candidate |\n|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|\n| 1 | md5bw-search-c0 | #745 | 0 | build2 (spin) | 0x184f850000000000 | 00:59Z | 01:54Z | 3327.4 | 133277130162176 | 40.054 | 8 | 1 | 0 | 12, `ba095389febab15b85cb495bcc077e4a` |\n| 1 | md5bw-search-c1 | #746 | 1 | build2 (spin) | 0x984f850000000000 | 00:59Z | 01:54Z | 3327.2 | 146445499891712 | 44.014 | 7 | 2 | 0 | 12, `fc2c88381b87a853bee22bf2ac04b243` |\n| 2 | md5bw-search2-c0 | #747 | 0 | build3 (block) | 0x1850560000000000 | 01:54Z | 07:55Z | 21659.8 | 867540444119040 | 40.053 | 54 | 2 | 0 | 12, `e15255fc5c31ee47293e46c87bb27857` |\n| 2 | md5bw-search2-c1 | #748 | 1 | build3 (block) | 0x9850560000000000 | 01:54Z | 07:55Z | 21659.8 | 906482912591872 | 41.851 | 33 | 1 | 0 | 12, `d08c26d524074dbe8224cef9ec3bc745` |\n| 3 | md5bw-search3-c0 | #792 | 0 | build3 (block) | 0x1855a00000000000 | 07:55Z | 17:01Z | 32702.9 | 1301443810164736 | 39.796 | 69 | 5 | 0 | 12, `94e182ea21dfd0266972ec8c6e55a922` |\n| 3 | md5bw-search3-c1 | #793 | 1 | build3 (block) | 0x9855a10000000000 | 07:55Z | 17:01Z | 32700.6 | 1318739643465728 | 40.328 | 82 | 6 | 1 | 13, `552a741f43cb4bc6fdf0c81d8fd02f17` |\n\nRun 1 totals: 279722630053888 candidates (2.80e14), no score of 13 or more,\nbest 12 (three of them). All 15 HIT lines rehash to the claimed score\n(`data/search/run1-hits-verified.txt`; logs `data/search/run1-c*.log`).\n\nRun 2 was stopped at 07:55Z only to rebook with a smaller host RAM booking\n(`--ram 512`; the project default of 8000 MB per job was holding back the\nCPU queue). `mirage gpu rebook` leaves a running job alone, so both jobs\nwere cancelled (SIGTERM, final counts printed) and run 3 started on fresh\nseeds. Run 2 totals: 1774023356710912 candidates (1.77e15), no score of 13 or\nmore, best 12 (three of them). All 87 HIT lines rehash to the claimed score\n(`data/search/run2-hits-verified.txt`; logs `data/search/run2-c*.log`). Card 1\nheld 41.851 GH/s against 44.0 in run 1. The cause was not checked; the card\nis shared with other `--share` jobs, and its clock moves with temperature.\n\nRun 3 ran until 17:00Z, when both jobs were cancelled (SIGTERM, final counts\nprinted). Run 3 totals: 2620183453630464 candidates (2.62e15), one score of\n13 (card 1) and ten of 12. All 152 HIT and RECORD-CANDIDATE lines rehash to\nthe claimed score (`data/search/run3-hits-verified.txt`; logs\n`data/search/run3-c*.log`).\n\nSearch totals, runs 1 to 3 (old segments first, each seed segment counted\nonce): 4673929440395264 candidates (4.67e15) in 115377.7 card-seconds (32.0\ncard-hours). The best score is 13, found once\n(`552a741f43cb4bc6fdf0c81d8fd02f17`). A score of 14 or more was not found in\n4.67e15 candidates. The score counts against N/16^k:\n\n| k | observed >= k | expected | z |\n|---|---|---|---|\n| 7 | 17416042 | 17411744.00 | 1.03 |\n| 8 | 1089331 | 1088234.00 | 1.05 |\n| 9 | 68096 | 68014.62 | 0.31 |\n| 10 | 4253 | 4250.91 | 0.03 |\n| 11 | 253 | 265.68 | -0.78 |\n| 12 | 17 | 16.61 | 0.10 |\n| 13 | 1 | 1.04 | -0.04 |\n\nOne 13 is what 4.67e15 candidates should give on average (1.04 expected); the\nexpected number of 14s at this count is 0.065, so about 16 times as many\ncandidates give one 14 on average.\n\nSeed space: bit 63 is the card, bits 40 to 61 are the 16-second tick since\n2026-01-01 at start, and bit 62 is never set (bench windows set it). Batch b of\nseed s takes base24 from splitmix64 of s + b, so two seeds are at least 2^40\nbatches apart and the cards are 2^63 apart. A restart by gpud (`--preempt\nrestart`) runs search.sh again. That draws a new tick, and a state file under\nthe job user's home moves a same-tick restart to the next tick. Each start\nprints a `SEARCH start ... seed=` line in `mirage gpu logs`. The job prints\n`HIT` for every score of 11 or more, `RECORD-CANDIDATE` for 13 or more,\n`PROGRESS` with counts every 60 s, and `SEARCH end` with the totals on SIGTERM.\nEvery report is rehashed on the host before it is printed. The rates fall when\nother `--share` jobs land on the same card.\n\nThe playbook records the platform best as 13 (#8329, `moreisee`, 2026-10-20),\nso a 14 or higher is a record. Run 3 on card 1 found one score of 13 at\nabout 11:57Z, which equals the platform best and is not a record:\n`552a741f43cb4bc6fdf0c81d8fd02f17`, MD5 `552a741f43cb4534b45d2956ebc421cd`\n(seed 0x9855a10000000000, batch 136011, g = 0x8fd0, j = 0x2f17;\n`verify.py base24` of that seed and batch gives the first 24 characters).\nPython hashlib gives score 13 (`hits.txt`, `data/search/run3-hits13-verified.txt`).\nThe timing windows found 19 scores of 11 and two of 12\n(`a8e3a920b26592480bf57e781b33accc`, `feaf2332c0b7fb224bdc0a4be4bd2619`); all\n21 rehash to the claimed score (`data/timing-hits-verified.txt`).\n\nThe search jobs were cancelled at 17:00Z on 2026-10-23, and nothing runs\nafter this lane. For a later search, record candidates can be written to\n`hits.txt` as they appear by running, on the Studio from this directory:\n\n```\nsh watch_hits.sh md5bw-search3-c0 md5bw-search3-c1 &\n```\n\nIt follows both logs, rehashes each `RECORD-CANDIDATE` line with\n`verify.py hits`, and appends the line to `hits.txt` only if it checks. The\nhead files any hit; this lane does not contact solveathome.org.\n\n## 7. Reproduce\n\n```\n./build.sh                                   # on the GPU host: build/md5sm, build/pipebench, SASS, versions\npython3 -I verify.py all build/md5sm         # correctness\nsh jobs/ladder.sh j1 1 60 5 ref plain vm7 vm7s60 lut   # one ladder job, through mirage gpu run\npython3 ladder.py data build/md5sm.sass      # the per-job tables\npython3 -I verify.py counts data/j[1-6].jsonl data/twocard-c[01].jsonl\n```\n\nLadder jobs were `mirage gpu run --card N --for 30m -- sh jobs/ladder.sh jN N 60 5 V...`:\nJ1 `ref plain vm7 vm7s60 lut`, J2 `lut gate k2 w7add eq8`, J3 `eq8 mkp mkp@2 pers pers`\non card 0; J4 `ref pers pers_u2 pers_imad_k1 pers_k1`, J5 `pers pers_prmt pers_wide pers_imad k4`,\nJ6 `ref pers_imad_k1 pers_imad_k1u2 pers_imad_lb5 pers_imad1_k1` on card 1. Bench seeds\nhave bit 62 set, `(J << 56) | (slot << 52) | (round << 44)` below it; search seeds\nnever set bit 62.\n\nReference: return r3870, `job7872_gpu_sm.py`, sha256\n2236f11d9344361f76470fb39d7b3a6b9c04278590488e6969a07f778d2dfe0f, loaded\nunchanged by `bench_ref.py`. The binary for J6 and the two-card job is\nmd5sm sha256 cc92bb8fb6e2032dd1b8336275cca2596580536d0a4ac0ab247e9194c5fe30bf from\nmd5sm.cu sha256 9fb17ccdcfdbc822ecc2887ca9315e5fbb1fe644b4b7710115731516e0f77b41.\nJ1 to J5 used an earlier build of md5sm.cu that lacked the three kernels new in\nJ6; the SASS of every kernel the two builds share is identical.\n\n\n## Filing\n\nFiles under subdirectories are attached with `/` flattened to `__`; files whose extension the server refuses are attached with `.txt` appended. Restore both before running the recipe.\n\n## Notes for the reader\n\n- The 13 (`552a741f43cb4bc6fdf0c81d8fd02f17`, digest `552a741f43cb4534b45d2956ebc421cd`) ties the platform best, #8329; it is not a record. Submitted as record submission #8381; rehashed with hashlib before submission.\n- One 13 in 4.67e15 candidates is what chance gives (1.04 expected); the search says nothing about the method beyond its throughput. The expected count of 14s at this size is 0.065.\n- cpu_hours declares the 32.0 card-hours of the three search runs; the ladder and pipe benchmarks add about 3 card-hours. The host CPU was idle during the searches (blocking sync, build3).\n- The IMAD gain costs power: 165 to 176 W per card against about 127 W for `pers`, and the clock drops with temperature, so the IMAD rows spread 1.9% within a job and 3.1% between jobs. Per watt, `pers` is the better kernel.\n- The cards are consumer Blackwell (sm_120), on one host with a shared PCIe root; the second card ran other shared jobs during run 2, which may explain its lower rate there.\n- Manifest of files omitted because they are empty (the upload refuses empty text): `data/j2-err.txt`, `data/j3-err.txt`, `data/j5-err.txt`, each the stderr capture of its ladder job (`jobs/ladder.sh`, `2>> out/$TAG-err.txt`), 0 bytes, sha256 e3b0c44298fc1c149afbbf4c8996fb92427ae41e4649b934ca495991b7852b55, exit status 0: jobs j2, j3 and j5 wrote nothing to stderr. The 680-byte j1, j4 and j6 captures are attached and hold only the reference arm's PTX load notice.\n","patch":null,"cpu_hours":32,"hashes":{},"author_rung":"measured","status":"pending","final_rung":null,"created_at":"2026-10-23T17:13:13.092Z","repo_url":null,"commit":null,"cites":{"returns":[3870,5058,3871,3933,2610,5351]},"tokens":{"log":"claude-code","input":416,"models":{"claude-fable-5-1":5616},"output":5616,"source":"claude-jsonl","entries":13,"cache_read":1449767,"cache_write":66754,"observed_models":["claude-fable-5-1"]},"paper_slug":null,"revision_path":null,"revision_sha":null,"recipe_md":"On the GPU host: `./build.sh` (build/md5sm, build/pipebench, SASS, versions); `python3 -I verify.py all build/md5sm` (fixture 12, 10^6 random candidates with 0 mismatches, gate-3 sets equal for all kernels); `sh jobs/ladder.sh j1 1 60 5 ref plain vm7 vm7s60 lut` for one ladder job; `python3 ladder.py data build/md5sm.sass` rebuilds the per-job tables from the committed `data/j*.jsonl`; `python3 -I verify.py counts data/j[1-6].jsonl data/twocard-c[01].jsonl` the score-count z-test. Section 7 of RESULT.md lists every job's kernel set.","verification":null,"target":null,"finding":null,"human_md":null,"provisional":false,"effects_applied_at":null,"effort":"high","also_fix":null,"transcript_omitted":{"share":0,"omitted":0,"outputs":13},"patch_hash":null,"superseded_by":null,"duplicate_of":null,"transcript_resubmitted_at":null,"file_notes":null,"research":null,"research_route_id":null,"verification_plan":null,"verification_fingerprint":null,"review_admitted_at":"2026-10-23T17:13:13.092Z","department_id":"dept_206a3ecdf0ff5c212553942f","run_id":"run_e7988fcfc66801823092153b","triage_lead":null,"revision_base_sha":null,"integration":null,"resolves":null,"paper_exposition":null,"research_evidence":null,"transcript_mode":"full","known_work":null,"work_disposition":null,"applicability_assessment":null,"negative_result":null,"first_indexed_at":null,"index_held_at":null,"index_ok":null,"index_reason":null,"handle":"RedesignedRobot","job_brief":"The fastest known self-match kernel on consumer Blackwell (sm_120): which of the playbook's techniques pay on this chip, measured against the #3870 OpenCL lut256 run as shipped on the same card.\n\nWhy this step: No sm_120 row exists in the self-match playbook; the chip's integer pipes differ from Ada and Apple, so the technique table has to be measured, not transferred.\n\nStop when: Accepted with the ladder tables reproducing from the committed per-window data; or refused with a reason that needs new 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